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EUCLYD signs €200 million funding round to cut AI inference costs

16 September 2026

 

Founded in 2024, EUCLYD has signed a financing round exceeding €200 million and appointed former ASML chief executive Peter Wennink as chairman.

The Eindhoven-based semiconductor systems company announced on 15 September that the Series A round is co-led by Samsung, Somerset Capital Partners, the EQT-managed Scaleup Europe Fund and Innovation Industries.

The money will support an ambitious undertaking: developing specialised silicon, its memory architecture and the systems needed to put both to work in data centres.

EUCLYD’s target is AI inference: using a trained AI model to generate answers, predictions or other outputs. Training creates or updates the model, inference puts it to work. As businesses use models more frequently, the cost of delivering those answers becomes an increasingly important engineering problem.

A more efficient system could serve more users within the same electricity budget, or make an application affordable that previously cost too much to operate.

 

EUCLYD’s founders and semiconductor background

 

EUCLYD dates its founding to 2024 and identifies Bernardo Kastrup and Atul Sinha as its founders. Established at High Tech Campus Eindhoven, it brings together two veterans with connections to Silicon Hive, the Eindhoven processor-design company acquired by Intel in 2011.

Kastrup, EUCLYD’s chief executive, worked at Philips Research, Silicon Hive and ASML. He is also an author and philosopher, an unusual combination in the semiconductor industry. His engineering career provides the more direct connection to EUCLYD’s ambitions.

Sinha was Silicon Hive’s founder and chief executive. He led the company through its acquisition by Intel, giving him experience of taking specialised processor technology through commercial development and into a much larger semiconductor business.

That shared history helps explain the choice EUCLYD is making. Its founders are pursuing processors designed around particular computational demands, drawing on experience that predates the current AI boom.

Eindhoven also puts the company within an established semiconductor ecosystem. Wennink brings experience of scaling a business dependent on complex engineering, suppliers and demanding international customers.

 

Why AI inference needs fast memory

 

The calculations inside a large language model rely on enormous collections of numerical parameters, alongside information associated with the current request. Those numbers must be available when processors need them.

Two constraints follow. Memory capacity determines how much data a system can hold. Memory bandwidth determines how quickly processors can access it.

Adding calculation power does not automatically solve either problem. Hardware may be capable of doing arithmetic faster than its memory system can supply the necessary numbers. Moving data also consumes energy.

Imagine a kitchen with excellent chefs but ingredients stored down a long corridor. More chefs will not necessarily get dinner onto the table sooner. Reorganising the kitchen could.

For AI infrastructure, the task is to organise memory, processing and communication so less time and energy are spent feeding the calculation machinery.

Agentic AI applications add another demand. An assistant that plans a task, uses tools and checks its results may call a model repeatedly before completing one request. A seemingly simple piece of office work can therefore trigger a long sequence of inference operations.

 

Craftwerk combines specialised AI processors and memory

 

EUCLYD’s roadmap combines Craftwerk silicon (the world's first "agentic AI silicon") with Craftwerk station systems. Its approach uses programmable application-specific integrated circuits, or ASICs, alongside a memory architecture developed to support them.

An ASIC specialises in a particular class of work. Programmability provides scope to accommodate changing workloads, although the practical flexibility depends on both the hardware and its software.

EUCLYD’s proposition is to design these layers together: how calculations are performed, how their data is supplied and how multiple components operate as a system. Its announced architecture uses custom processors capable of applying the same instruction to multiple pieces of data in parallel, a useful property for the repeated numerical operations inside AI models.

Earlier specifications described processors and memory brought together in a chiplet-based package, containing multiple pieces of silicon. The design specified one terabyte of custom memory per package, using an architecture EUCLYD calls Ultra Bandwidth Memory.

Capacity on that scale could help keep substantial model data close to processing resources. What fits depends on the model’s size, numerical format and space needed for active requests.

 

What the €200 million funding will support

 

EUCLYD publicly introduced Craftwerk in September 2025. In November, it announced a development partnership with South Korean semiconductor design house ADTechnology, a step towards implementing its architecture as manufacturable silicon.

ADTechnology’s stated role includes backend design and coordination of manufacturing through its Samsung Foundry partnership. This covers work required to turn the logical chip design into a physical implementation suitable for production.

The September 2026 funding is intended to support the next stage. Alongside the co-leads, investors include Denmark’s Export and Investment Fund, EIFO, imec.xpand, Brabant Development Agency, BOM, and Quadri.

EUCLYD specified that the funding will expand engineering, accelerate silicon and systems development, strengthen partnerships and prepare commercial deployment across enterprise, sovereign and hyperscale AI markets.

In practical terms, such a programme involves verifying chip designs, developing software, testing hardware and integrating complete systems: enterprises need technology that integrates into existing operations, sovereign AI projects seek greater control over strategic infrastructure, and hyperscale operators need it to work across large installations.

 

EUCLYD’s competitors in AI inference hardware

 

EUCLYD enters a field where rivals are already pursuing efficiency across hardware and software.

Nvidia competes through graphics processing units, or GPUs, networking, complete systems and a widely used software ecosystem. Its inference platform continues to evolve, so a challenger must offer enough benefit to justify adopting a different system.

US company d-Matrix tackles data movement through digital in-memory computing. Its Corsair platform brings computation into the memory architecture, making it a particularly relevant comparison for EUCLYD’s memory-centred approach.

Cerebras uses wafer-scale processors, integrating computation and memory across an exceptionally large piece of silicon. It pursues fast inference through a different physical design.

The approaches differ, but customers face the same purchasing test: how well does a system run their models, and what does it cost to operate?

EUCLYD has signed substantial financing to develop its answer. The commercial test is straightforward: deliver comparable model quality and response speed while using less money and energy.

 

 

 

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